Efficient Algorithms and Architectures for Multiuser Channel Estimation and Detection in Wireless Base-station Receivers

This paper presents efficient algorithms and architecture designs that can meet real-time requirements of multiuser channel estimation and detection in future wireless base-station receivers. Sophisticated algorithms proposed to implement multiuser channel estimation and detection make their real-time implementation difficult on current Digital Signal Processor (DSP)-based receivers. A maximum-likelihood based multiuser channel estimation scheme requiring matrix inversions is redesigned from an implementation perspective for a reduced complexity, iterative scheme with a simple fixed-point VLSI architecture. A reduced-complexity, bit-streaming multiuser detection algorithm that avoids the need for multishot detection is also developed for a simple, pipelined VLSI architecture. Thus, we show that real-time solutions, with 3-4 orders of magnitude performance improvements over DSPs, can be achieved for next generation wireless systems by (1) designing the algorithms from an implementation perspective, without significant loss in error rate performance, (2) task partitioning and (3) designing bit-streaming fixed-point VLSI architectures to exploit available pipelining, parallelism and bit-level computations.